delay assignment
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- 时延分配
双语例句
- Interconnection delay has become a dominant factor in IC design.
互连线时延是集成电路设计中非常重要的影响因素。 - The instance results showed that the delay was well compensated, the stability and the speediness were guaranteed.
仿真结果表明，该算法的时延补偿性能良好，保证了控制的快速性和稳定性。
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